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How to Improve Charging Efficiency of Wireless Charger from Circuit Design

2019-9-3      View:

In the last issue, we analyzed together the factors that affect the charging efficiency of wireless chargers. Let's take a look at how to improve the charging efficiency of the wireless charger in this issue.

First, let's analyze the situation of the transmitter, that is, the wireless charger, to see which modules of the transmitter have a greater impact on the charging efficiency and how to deal with them. We first analyze the factors that affect the charging efficiency from the circuit design and the methods to improve the charging efficiency.

1. MOSFET device conduction loss

Four power MOSFET are needed in a 5V full-bridge charging system. There are two kinds of full-bridge structures, one is four NMOS transistors, the other is two NMOS transistors and two PMOS transistors.

During the operation of the system, at least two tubes are conducting, so the loss of power MOSFET in the transmitting part is the largest.

In order to reduce the loss, it is necessary to consider using a tube with low conduction internal resistance. If the conduction internal resistance is relatively small, the conversion efficiency of the system will be better.

Of course, there is a certain relationship between the low on-resistance of MOSFET and its cost. If the on-resistance is very low, the cost will be relatively high. We should compromise the system design and find a good balance point.

2. Losses due to untimely control and control response of the main controller

In a magnetic induction type wireless charging system, the receiving end is a passive induction end. Theoretically, the receiving end can receive all power except loss as much as the transmitting end provides. However, in practical application, the transmitting power of the transmitting end is flexibly adjusted according to the receiving end. Excessive transmitting power will cause excessive power loss in the rectifying part and the step-down part of the receiving end. Therefore, in order to minimize unnecessary loss, it is necessary to accurately control the power output of the receiving end.

In the working process of the system, the transmitting end and the receiving end communicate in real time through a 2kHz FM carrier, so the transmitting end can obtain the power feedback information of a receiving end through demodulation, and then adjust the transmitting power in real time according to this information to ensure the maximum transmission of effective power.

However, for the load at the receiving end, it is not a constant and stable output. In most cases, the output will have a jump with fast current change, and the corresponding modulation signals will also change rapidly. This requires the main controller of the transmitting board to process these demodulation signals in time, thus adjusting the power output in time.

The main frequency of the main controller determines the processing capacity of the processor to a certain extent, determines the adjustment speed for load changes, and finally determines the effective power.

Another key point is that accurate control of the output power requires accurate control of the PWM drive signal, which is a square wave signal with a duty ratio of 50% between 110 khz and 205 khz. therefore, the PWM drive signal needs to be output with frequency conversion at a step below 1KHz or even at 100Hz, which requires that the performance of the main control PWM control unit should be good enough to meet the requirements.

3. Switch Dead Time Loss

The transmitter can be regarded as a switching power supply, and the oscillation signal is generated by MOS switches, so the switching loss of the system is inevitable.

In order to reduce the loss, it is theoretically required that the rising and falling time of PWM control signal is short enough. In a 5V full bridge system, only one upper half bridge and one lower half bridge can be opened at the same time, i.e. Q1 and Q4 or Q2 and Q3 can only conduct one group at the same time. As shown in the figure, the red arrow part is the normal current path, and the two groups of tubes are alternately conducted to generate oscillation and output power.

However, the switching drive signal, that is, PWM signal, cannot be turned on or off synchronously. If Q1 and Q3 or Q2 and Q4 are turned on at the same time at a certain time, resulting in instantaneous short circuit, the system will generate large switching power loss in this very short period of time. We need to avoid simultaneous on and off during design, and need to do a dead zone treatment. However, if the treatment is improper, the dead zone time is too long, the loss of the system will also increase.

The fundamental point to solve this dead zone is actually PWM timing control. That is, Q1 is turned on before Q3 is turned off, and vice versa.

Therefore, this timing problem can be optimized from two aspects to reduce dead zone.

First, from the software adjustment, the master control improves the dead zone problem by adjusting PWM timing.

The second is to do delay processing from hardware to shorten the dead time as much as possible. For example, some simple RC delay circuits adjust the charging and discharging time of RC circuits by selecting appropriate RC values to achieve the effect of delay, thus effectively reducing dead time and improving charging efficiency.

Of course, some driver chips have already considered dead zone and delay, and designers should consider them according to the specific chip scheme.

These are the methods and principles to improve the charging efficiency of wireless chargers from the circuit design. If you want to know more ways to improve the charging efficiency of wireless chargers, you can pay attention to the content of our official website in the future. We will provide more information.

Source of this article:https://ymp-hk.com/